1. ENCODING AND DECODING TECHNIQUES USED IN PHYSICAL CODING SUBLAYER USING UNIVERSAL VERIFICATION METHODOLOGY

Authors -  T.R. Ganeshbabu, S. Bharathikannan

Abstract :  Physical Coding Sub-layer is used in radio communication systems, for high speed data transmission and to avoid unbalanced data flow. PCS is common to a family of 10Gb/s and it provides all the services required by XGMII (10Gigabit Media Independent Interface) which includes Encoding and Decoding of XGMII data bits, Synchronization of code-groups and it supports the IEEE 802.3 Media Access Control (MAC). This paper mainly deals with Encoding and Decoding techniques used in PCS. In the transmitter side, we will deal with how to encode the data and what are the rules to follow to encode the data. Similarly, in the Receiver side, how to decode the data and what are the rules to follow to decode the data. The PCS is simulated in Verilog compiler simulator (VCS) using Universal Verification Methodology (UVM) and the results obtained are presented in this paper.
Keywords : Encoding and Decoding, Physical Coding Sub-layer, Common Public Radio Interface, UVM

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2. EXECUTION OF LOW POWER COMPLEMENTARY METAL OXIDE SILICON ID FOR APPROXIMATE COMPUTING WITH STATIC RANDOM ACCESS MEMORY

Authors -  B.S. Vishwanath, E. Sheeba Percis 

Abstract :  In every system, embedded memory plays a main role in digital processors and it consumes more than 50% of silicon area and power in embedded systems. Low power and high speed operation of memory is attractive because of their lower leakage power and active energy, but the challenges of memory design tend to increase at lower voltage. This research article presents the concept of hybrid memory architecture, called integrated dynamic SRAM (iD-SRAM which is a mixture of 8T SRAM and 3T DRAM). An eight-transistor SRAM (8T) cell is used to improve the speed of the operation with low voltage .It consists of 6T SRAM with the two read ported circuitry. Dynamic random access memory is mainly used because of its high-density and low retention power. This iD-SRAM is operated with analog input voltage of 1.58V and it’s suitable for approximate computing. The VLSI design of volatile iD-SRAM is designed and analyzes the power and delay value using cadence virtuoso 180nm CMOS technology.
Keywords : Embedded Memory, SRAM, CMOS, Approximate computing, Cadence

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3. REDESIGN RESONANT FREQUENCY BANDS FOR WIRELESS COMMUNICATION APPLICATIONS

Authors -  P.V.N. Reddy, E. Merlin Sathiyaraj  

Abstract :  In this research paper novel circular slotted multiband antenna for wireless application was presented. The antenna is simple to design, a Defected Ground Structure (DGS) is created by circular slots of different radii, 50 ohm feeding line as a radiator and rectangular shape slit connected to a circular slots at ground plane. Moreover reconfigurable multiband resonances are achieved by an appropriate placement of PIN diodes at the circular slots of defected ground plane and switching (ON/OFF) them according to requirement. The antenna exhibits three tunable resonant frequency bands which includes 2.5/3.5/5.7 GHz used in WLAN/WiMax/UWB applications. The antenna is designed on FR4 substrate. It is compact with dimensions of 28 × 16 × 0.8 mm3. The design and simulation work in this paper is carried with HFSS. The reconfigurable resonant frequency bands over a wide spectrum suggest that the proposed antenna design is appropriate for different wireless communication applications.
Keywords : Redesign, Multiband, Wireless Communication, PIN Diodes, DGS

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ISSN (Online): 2348-3105 | ISSN (Print): 2347-6729
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